The present invention generally relates to attenuation equalizing of transmission lines.
Transmission lines generally represent conductive connections between system elements carrying signal power. However, due to non-ideal physical properties of any transmission line, the transmission lines more or less attenuate the signals to be transmitted. FIG. 1a shows a schematic example of a transmission line 10 connected between a signal generator 20 at a node 25 and a termination impedance 30 at a node 35. The transmission line 10 shall also comprise a serial impedance 40. Both impedances 30 and 40 are normally designed to match the characteristic impedance of the transmission line 10. The signal generator 20 in FIG. 1a is exemplarily depicted as a pulse generator for generating rectangular pulses, e.g., in a digital system.
FIG. 1b shows the transmission line effect for an example of a typical transmission line 10 with a frequency dependent attenuation in the circuit according to FIG. 1a, whereby the x-axis shows the time in seconds and the y-axis shows the ratio of the input signal at node 25 divided by two times and the output signal at node 35. In this example, the transmission line 10 shall provide an impedance of 50 .OMEGA. with a propagation delay of 3.2 ns, and the impedances 40 and 30 shall also be 50 .OMEGA.. The rise time (defined as the time interval of a leading edge between the instants at which the instantaneous value first reaches specific lower and upper limits of 10% and 90% of the signal amplitude) of a stimulus signal 50 from the signal generator 20 is assumed to be 0.8 ns. The stimulus signal 50 appears at the impedance 30 as an attenuated signal 60, attenuated by almost 10% and it takes almost 10 ns until the output has achieved its final value.
In case that the signal generator 20 applies pulses at the node 25, and in particular rectangle pulses, the falling edge of a transmitted pulse at node 35 might already `start` before the rising edge has reached its maximum amplitude, due to the transmission line effect as shown in FIG. 1b. This leads not only to a degradation in shape of the original pulse, but also to a timing error as a change in the propagation delay for the negative slope with varying pulse widths. FIG. 1c shows the influence of the transmission line effect for pulses with decreasing pulse widths, whereby the x-axis shows the time in seconds and the y-axis shows the output signal at node 35. FIG. 1d depicts the dependency of the timing-error on the pulse width, whereby the x-axis shows the pulse width in seconds and the y-axis shows the timing-error in seconds. FIGS. 1c and 1d are both based on the values of the example of FIG. 1b.
It is apparent that an increasing timing-error occurs with a decreased pulse width. In particular in testing applications, e.g. in digital IC testers, with a required timing accuracy of 300 ps or less, an error of 65 ps at 1 ns pulse width (compare FIG. 1d) represents a significant portion. Slower transition times increase the error, whereas faster transition times decrease it.
Attenuation equalizers as corrective networks are commonly used in order to compensate the attenuation characteristics of transmission lines. The attenuation equalizers are generally designed to make an absolute value of a transfer impedance, with respect to two chosen pairs of terminals, substantially constant for a certain frequency range.
FIG. 2a depicts a common concept to avoid transmission line effects, as indicated by the FIG. 1, by providing an attenuation equalizer 100 for amplifying the higher frequencies more than the lower frequencies, or for attenuating the lower frequencies. The attenuation equalizer 100 is coupled between the node 25 and a node 105 before the transmission line 10.
An example of the attenuation equalizer 100 in FIG. 2a, as an R-C network for an ordinary high pass filter well known in the art, is given in FIG. 2b. The attenuation equalizer 100 comprises a parallel connection of a resistor 110 and a capacitor 120, coupled with one connection to the node 25 and with the other connection to a node 130. A second resistor 140 is shunted between the node 130 and ground, and a buffer 150 might be connected in series between the nodes 130 and 105.
FIG. 2c shows the stimulus signal 50 from the signal generator 20 and the corresponding attenuated signal 60 for a resistor-ratio to be chosen as 10.25:1 and a time-constant of 1.8 ns of the RC network in FIG. 2b. The rising edge of the attenuated signal 60 has been improved though the amplitude has been decreased. The thus improved error-curve is depicted in FIG. 2d.
A more detailed investigation still shows some errors since the simple approach cannot compensate the effect totally. More complex circuits including two or more time constants are able to reduce these even more. However, if simple R-C networks are applied as the attenuation equalizer 100, certain drawbacks have to be encountered:
The compensation ratio is fixed. PA1 The required time constant can hardly be achieved in an on-chip application. E.g., a 100 .OMEGA. resistor requires a 18 pF capacitor which requires a large amount of silicon space. PA1 The resulting time constant varies with large on-chip resistor tolerances (e.g., .+-.20%). PA1 Bringing the signal off-chip for compensation and on-chip for further buffering introduces additional capacitances and inductances in a possibly highly sensitive high-frequency signal path.
Other attenuation equalizers are known in the art, such as EP 0 607 702 A2 disclosing an attenuation equalizer designed for long transmission lines (about 100 m) and frequencies in the range of 125 MHz. JP 7007375 discloses a further attenuation equalizer, wherein an element constant is controlled by a filter constant control circuit. Data given to the circuit connects a switch to a pulse waveform generator side, connects another switch to a transmission line side, and connects a further switch to a waveform measuring instrument side.